I think event BR_RETIRED is not implemented.
Resister PMCEID1_EL0 is always zero.
AArch64 Performance Monitors registers
$ perf stat -e task-clock,cycles,instructions,branch-misses,armv8_cortex_a72/inst_retired/,armv8_cortex_a72/br_retired/,armv8_cortex_a72/br_mis_pred/ -- sleep 0
Performance counter stats for 'sleep 0':
7.109840 task-clock (msec) # 0.652 CPUs utilized
699200 cycles # 0.098 GHz
491727 instructions # 0.70 insns per cycle
8059 branch-misses # 1.133 M/sec
491727 armv8_cortex_a72/inst_retired/ # 69.161 M/sec
0 armv8_cortex_a72/br_retired/ # 0.000 K/sec
8059 armv8_cortex_a72/br_mis_pred/ # 1.133 M/sec
0.010912797 seconds time elapsed